Title :
Development of ASIC datapath compilers for gate array designs
Author :
Mitra, Blswadip ; Rao, Kameshwar ; Jha, Shantanu ; Bagherli, Jalal
Author_Institution :
Texas Instrum. Pvt. Ltd., Bangalore, India
Abstract :
The authors present a complete development flow of ASIC datapath compilers for gate array designs. The module design and usage flow for the parameterized datapath elements is described. The efficiency achieved through the use of a highly integrated design environment is highlighted
Keywords :
application specific integrated circuits; circuit layout CAD; logic CAD; logic arrays; ASIC datapath compilers; CAD; gate array designs; integrated design environment; module design; parameterized datapath elements; Application specific integrated circuits; Character generation; Costs; Instruments; Silicon; Software design; Temperature; Test pattern generators; Timing; Workstations;
Conference_Titel :
VLSI Design, 1991. Proceedings., Fourth CSI/IEEE International Symposium on
Conference_Location :
New Delhi
Print_ISBN :
0-8186-2125-7
DOI :
10.1109/ISVD.1991.185133
