Title :
Ultrathin SiO2 interface layer growth
Author :
Bevan, M.J. ; Curtis, R. ; Guarini, T. ; Liu, W. ; Hung, S.C.H. ; Graoui, H.
Author_Institution :
Appl. Mater., Inc., Sunnyvale, CA, USA
fDate :
Sept. 28 2010-Oct. 1 2010
Abstract :
A variety of processes based on radical oxidation (N2O/H2) and spike RTO are investigated in this study to grow ultrathin SiO2 layers. Their process space is mapped out to cover regimes of interest for gate-last or gate-first integration of high k dielectrics with metal gates. Applied´s Centura RTP chamber is found to be readily compatible with the requirements associated with 22/20nm CMOS technology.
Keywords :
high-k dielectric thin films; oxidation; rapid thermal processing; silicon compounds; CMOS technology; RTP chamber; SiO2; high k dielectrics; metal gate; radical oxidation; ultrathin interface layer growth;
Conference_Titel :
Advanced Thermal Processing of Semiconductors (RTP), 2010 18th International Conference on
Conference_Location :
Gainesville, FL
Print_ISBN :
978-1-4244-8400-3
DOI :
10.1109/RTP.2010.5624252
