• DocumentCode
    2889087
  • Title

    A four quadrant MOS analog multiplier

  • Author

    Pena-Finol, J. ; Connelly, J.

  • Author_Institution
    Harris Semiconductor, Melbourne, FL
  • Volume
    XXX
  • fYear
    1987
  • fDate
    0-0 Feb. 1987
  • Firstpage
    214
  • Lastpage
    215
  • Abstract
    An MOS analog multiplier based on the square law algebraic identity will be covered. The multiplier achieves a nonlinearity of 9.44%, a bandwidth of 5MHz, dynamic range of 87dB and total harmonic distortion of 0.59%. The chip was fabricated with a 5μm P-well CMOS process. Size is 500mil2and total power consumption is 10mW.
  • Keywords
    CMOS technology; Differential amplifiers; Dynamic range; Frequency; Operational amplifiers; Resistors; Signal processing; Summing circuits; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1987.1157181
  • Filename
    1157181