DocumentCode
2889248
Title
Scan path testing of a multichip computer
Author
Schuchard, R. ; Weiss, Daniel
Author_Institution
Hewlett-Packard Co., Fort Collins, CO, USA
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
230
Lastpage
231
Abstract
On-chip test support circuitry has been developed for a 32b multichip VLSI computer. The test support consists of a test PLA and a 45MHz diagnostic interface port that multiplexes up to 16 serial scan paths. While requiring less than 10% of chip area and power, it supports testing, characterization and diagnosis from chip to system level.
Keywords
Circuit testing; Design for testability; Driver circuits; Electronics packaging; Hardware; MOS devices; Registers; Software testing; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157190
Filename
1157190
Link To Document