Title :
A 30-MFLOPS CMOS single precision floating point multiply/accumulate chip
Author :
Staver, D. ; Chung-Yih Ho ; Molnar, K. ; Baertsch, R.
Author_Institution :
General Electric Corporate Research & Development Center, Schenectady, NY, USA
Abstract :
A 32b floating point IC, implemented in a 1.2μm CMOS technology, will be described. A pipeline rate of 15MHz has been obtained at a 30MHz clock rate. The 56K transistor chip measures 7.2×8mm.
Keywords :
Adders; Application specific integrated circuits; Bismuth; Conference proceedings; Delay; Parallel processing; Pins; Pipelines;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157192