DocumentCode :
2889311
Title :
Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs
Author :
Chen, Yibo ; Kursun, Eren ; Motschman, Dave ; Johnson, Charles ; Xie, Yuan
Author_Institution :
Pennsylvania State Univ., University Park, PA, USA
fYear :
2011
fDate :
1-3 Aug. 2011
Firstpage :
397
Lastpage :
402
Abstract :
The three-dimensional integrated circuits (3D ICs) offer performance advantages thanks to the increased bandwidth and reduced wire-length enabled by through-silicon-via structures (TSVs). Traditionally TSVs have been considered to improve the thermal conductivity in the vertical direction. However, the lateral thermal blockage effect becomes increasingly important for TSV via farms (a cluster of TSV vias used for signal bus connections between layers). TSV farms can cause different thermal effects on different layers due to the unequal x, y, z thermal conductivities. This can exhibit itself as thermal improvement in the vertical heat flow, at the same time lateral heat blockage effects in thinned pass-through layers. In this paper, we propose a thermal-aware via farm placement technique for 3D ICs to minimize lateral heat blockages caused by dense signal bus TSV structures. By incorporating thermal conductivity profile of via farm blocks in the design flow and enabling placement/aspect ratio optimization, the corresponding hotspots can be minimized within the wire-length and area constraints.
Keywords :
circuit optimisation; integrated circuit design; integrated circuit interconnections; power aware computing; thermal conductivity; three-dimensional integrated circuits; 3D IC design; lateral thermal blockage effect analysis; lateral thermal blockage effect mitigation; placement-aspect ratio optimization; signal bus connection; thermal aware via farm placement technique; thermal conductivity; three-dimensional integrated circuits; through-silicon-vias; Conductivity; Heating; Optimization; Silicon; Thermal conductivity; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design (ISLPED) 2011 International Symposium on
Conference_Location :
Fukuoka
ISSN :
Pending
Print_ISBN :
978-1-61284-658-3
Electronic_ISBN :
Pending
Type :
conf
DOI :
10.1109/ISLPED.2011.5993673
Filename :
5993673
Link To Document :
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