DocumentCode
2889329
Title
Low-cost gate drive for enhancement mode SiC JFET devices
Author
Yoong Heng Chan ; Liang, Yung C. ; Tien, David
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
fYear
2013
fDate
3-6 June 2013
Firstpage
736
Lastpage
739
Abstract
The main objective of this work is to develop a low cost gate drive circuit for the enhancement mode SiC JFET device with a comparable switching performance as those of commercial ones. To achieve this low cost requirement, the gate drive circuit design needs to use only components which are widely available. In this paper, the proposed SiC JFET gate drive circuit design is described and its switching performance is experimentally verified. The targeted cost per gate drive circuit is made to be less than US$10, which is a sizeable cost reduction in comparison to a commercially available gate drive.
Keywords
junction gate field effect transistors; power field effect transistors; silicon compounds; wide band gap semiconductors; cost reduction; enhancement mode silicon carbide JFET devices; low-cost gate drive circuit design; switching performance; Europe; Logic gates; Switches; SiC JFET Gate Drive; high temperature Introduction; wide bandgap devices;
fLanguage
English
Publisher
ieee
Conference_Titel
ECCE Asia Downunder (ECCE Asia), 2013 IEEE
Conference_Location
Melbourne, VIC
Print_ISBN
978-1-4799-0483-9
Type
conf
DOI
10.1109/ECCE-Asia.2013.6579183
Filename
6579183
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