DocumentCode
2889331
Title
An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver
Author
Kwon, Minho ; Han, Gunhee
Author_Institution
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul
fYear
2007
fDate
27-30 May 2007
Firstpage
5
Lastpage
8
Abstract
This paper proposes a multiplexing scheme to realize an I/Q channel time-interleaved (TI) band-pass sigma-delta modulator (BPSDM) that shares OTAs to minimize power consumption and silicon area for a low-IF wireless receiver. The test chip was fabricated for a 10.7-MHz IF system with a 0.35-mum CMOS process. The measured peak SNDR for a 200-kHz bandwidth is approximately 73 dB. The power consumption of the fabricated chip is 61 mW with a 3.3-V supply and the silicon area is 1.78 mm2.
Keywords
CMOS integrated circuits; operational amplifiers; receivers; sigma-delta modulation; 0.35 micron; 10.7 MHz; 200 kHz; 3.3 V; 61 mW; CMOS process; OTA; band-pass sigma-delta modulator; operational amplifiers; time-interleaved modulator; wireless receiver; Adders; Analog-digital conversion; Band pass filters; Delta-sigma modulation; Energy consumption; RF signals; Receivers; Silicon; Strontium; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378129
Filename
4252557
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