Title :
30MHz compiled chip set for graphics computations
Author :
Noujaim, S. ; Hartley, Richard ; Cline, H. ; Jerdonek, R. ; Ludke, S.
Author_Institution :
General Electric Corporate Research and Development Center, Schenectady, NY, USA
Abstract :
A 1.25μm CMOS chip that has attained a device density of 1500 transistors/mm2, using a silicon compiler for design, will be described. The bit-slice elements of the chip communicate serially to implement a pipeline with a throughput of 50 million multiply/accumulates/s at a 30MHz clock rate.
Keywords :
Adders; Algorithm design and analysis; CMOS technology; Circuit testing; Clocks; Fixed-point arithmetic; Graphics; Layout; Libraries; Silicon;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157199
