Title :
Optimal module implementation and its application to transistor placement
Author :
Her, T.W. ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Abstract :
The authors present an algorithm for selecting implementations for rectangular modules given a placement of the modules in multiple rows. A module is a rectangle with terminals located on the top and the bottom edges. An implementation of a module is specified by its dimension and a placement of the terminals along the top and bottom edges of the module. The algorithm accepts as input a placement of the modules and a set of possible implementations of each module, and selects an implementation for each module to minimize the total height of the layout. The time complexity of the algorithm is specified. The authors also present two extensions of the algorithm. The algorithm can be applied to CMOS transistor placement and has been implemented in the custom cell synthesis system of the MCC Physical Satellite. The algorithm was tested on cells selected from the MCNC benchmarks and industry, and reductions of up to 19% in layout area were obtained.<>
Keywords :
CMOS integrated circuits; circuit layout CAD; computational complexity; CMOS transistor placement; MCC Physical Satellite; MCNC benchmarks; custom cell synthesis system; layout area; multiple rows; rectangular modules; time complexity; Application software; Benchmark testing; Density measurement; Satellites; Shape; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
DOI :
10.1109/ICCAD.1991.185202
