DocumentCode :
2890135
Title :
Synthesis of optimal 1-hot coded on-chip controllers for BIST hardware
Author :
Mukherjee, D. ; Njinda, C. ; Breuer, M.A.
Author_Institution :
Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
1991
fDate :
11-14 Nov. 1991
Firstpage :
236
Lastpage :
239
Abstract :
The authors present a procedure for merging on-chip controllers for BIST (built-in self-test) circuitry to reduce hardware overhead. Instead of starting with one minimal state assignment and then performing state, input, and output encoding, one picks the 1-hot code state assignment and implicitly searches the space of minimum prime compatible state covers to obtain an optimal merged controller. This procedure uses knowledge of the greatest lower bounds on states, arcs, next-state, and the output logic of the merged controller to prune the search space.<>
Keywords :
built-in self test; controllers; logic design; logic testing; 1-hot code state assignment; BIST hardware; SOHOT; built-in self-test; merged controller; minimum prime compatible state covers; on-chip controllers; output encoding; output logic; Built-in self-test; Circuit synthesis; Circuit testing; Hardware; Kernel; Logic testing; Optimal control; Registers; Time division multiplexing; Time factors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
Type :
conf
DOI :
10.1109/ICCAD.1991.185241
Filename :
185241
Link To Document :
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