A Three-Stage Amplifier with Quenched Multipath Frequency Compensation for All Capacitive Loads

Author

Hu, Jingjing ; Huijsing, Johan H. ; Makinwa, Kofi A A

Author_Institution

Electron. Instrum. Lab., Delft Univ. of Technol.

fYear

2007

fDate

27-30 May 2007

Firstpage

225

Lastpage

228

Abstract

This paper describes a three-stage CMOS amplifier that is stable for all capacitive loads. This is achieved by adding a so-called quenching capacitor to the multipath nested Miller compensation (MNMC) topology. Theoretical calculations and simulation results are provided to verify the improved stability obtained by the quenched multipath nested Miller compensation (QMNMC) topology. The amplifier is designed in a 0.7-mum CMOS process, and can drive all capacitive loads with a minimum phase margin of 20deg. It has a unity-gain bandwidth of 1MHz, a gain of 90-dB and a slew rate of 0.57 V/mus for 100pF capacitive load. It employs a quenching capacitance of only 18 pF, and dissipates 480 muW from a 3.0 V supply.

Keywords

CMOS integrated circuits; amplifiers; capacitors; compensation; 0.7 micron; 1 MHz; 100 pF; 18 pF; 3 V; 480 muW; 90 dB; CMOS process; improved stability; quenched multipath frequency compensation; quenched multipath nested Miller compensation; quenching capacitor; three-stage CMOS amplifier; CMOS technology; Capacitance; Capacitors; Circuit stability; Frequency; Instruments; Laboratories; Paper technology; Power amplifiers; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378317

Filename

4252612