Obtaining functionally equivalent simulations using VHDL and a time-shift transformation

It is pointed out that many translation schemes from domain-specific languages to supposedly functionally equivalent VDHL (VHSIC hardware description language) have been developed as an approach to simulation. However, due to a subtle theoretical limitation to this approach, functionally equivalent VHDL cannot be created for the general case, making such translations an unsound technique. The authors propose an alternative approach which strives instead for functionally equivalent simulation, while still taking advantage of VHDL simulators. This method uses a novel time-shift transformation in conjunction with any translation scheme, making correct simulations easily obtainable. This bridges the gap to a sound and advantageous use of VHDL as a tool for simulating domain-specific languages.<>