Automatic generation of an FPGA based embedded test system for printed circuit board testing

This paper describes an FPGA based embedded test system, designed for testing of printed circuit boards during the manufacturing process. The test system architecture is automatically generated based on a layer description, which provides the required flexibility for the generation of the test system, and for the abstraction of the test functions. The test system is composed of a software and a hardware part, and generated based on the board´s properties and the specified test algorithms. The paper presents the test system architecture and automatic generation flow, with emphasis on the software generation process. The paper also includes experimental results obtained when performing an SRAM interconnection test.