DocumentCode :
2890753
Title :
Design of Maximum-Efficiency Integrated Voltage Doubler
Author :
Cabrini, A. ; Gobbi, L. ; Torelli, G.
Author_Institution :
Dept. of Electron., Pavia Univ.
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
317
Lastpage :
320
Abstract :
In this paper, an algorithm and the analytical expressions to be used for the design of maximum-efficiency integrated charge pumps based on the voltage doubler architecture are presented. Starting from basic considerations on charge transfer, the proposed methodology allows adequate choice of the stage number and of the size of all charge pump elements, namely, capacitors, transfer switches, and phase drivers. The whole design flow ensures the target output voltage and output current values to be achieved taking the parasitic elements (capacitances and switch on-resistances) into account. The proposed design strategy was implemented in C#reg environment, thus allowing an automated CP design.
Keywords :
integrated circuit design; voltage multipliers; charge transfer; integrated charge pumps; maximum-efficiency integrated voltage doubler; voltage doubler architecture; Algorithm design and analysis; Capacitors; Charge pumps; Driver circuits; Frequency; MOSFETs; Parasitic capacitance; Switches; Topology; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.378399
Filename :
4252635
Link To Document :
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