An on-line memory state validation using shadow memory cloning

This paper describes an on-line memory and CPU register state validation methodology in virtualized simulated environments where an Instruction Set Simulator (ISS) executes native applications on top of Operating System (OS) and dynamic translation is enabled. A Virtual System Prototyping (VSP) environment models a platform providing host memory pointers and a CPU core requesting read, write and execute direct memory accesses to the platform. A platform allocated shadow memory captures memory accesses during native code instruction execution. Another specially cloned shadow memory copy that supplies host pointers to the core captures memory accesses while executing dynamically translated code instructions. The methodology comprises saving execution contexts, reloading the ISS from a restart point and brunching the ISS execution either on native or translated codes. An online checker compares memory and register states at specially defined check points of interest. A cosimulation tool has been implemented in C++ as a loadable module into the VSP controlled by the ISS simulated events.