Variations of fault manifestation during Burn-In — A case study on industrial SRAM test results

Modern microcontroller devices for automotive applications are highly safety critical, and so are their embedded memories. It is necessary to ensure the memories to be fail safe during life time. Hence, the detection of latent faults is a big issue in memory testing, as these faults may remain during life time, but need to be detected early in production. Burn-In makes such faults detectable as they become manifested through high voltage and temperature stress. Faults that are marginal before Burn-In appear clearly after Burn-In, and additional faults occur that have not been detected before. In this paper we present industrial test results of Pre-Burn-In and Post-Burn-In tests, and we describe the variation of fault manifestation and fault distribution due to the effect of stress during Burn-In. We can show that former invisible faults become detectable through Burn-In stress and the manifestation of faults changes from dynamic to static.