• DocumentCode
    2891405
  • Title

    Optimal VLSI architecture for vector quantization

  • Author

    Hu, Yu Hen

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
  • Volume
    5
  • fYear
    1995
  • fDate
    9-12 May 1995
  • Firstpage
    2853
  • Abstract
    Optimal VLSI array structure design for the implementation of vector quantization (VQ) are investigated in this paper. After a brief review of the VQ algorithms, the algorithm and architecture design issues will be discussed. This is followed by a brief survey of existing VQ implementation strategies and architecture
  • Keywords
    VLSI; digital signal processing chips; systolic arrays; vector quantisation; architecture design; array structure design; optimal VLSI architecture; systolic VLSI array processors; vector quantization; Algorithm design and analysis; Books; Computer architecture; Distortion measurement; Feature extraction; Hardware; Size measurement; Testing; Vector quantization; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, 1995. ICASSP-95., 1995 International Conference on
  • Conference_Location
    Detroit, MI
  • ISSN
    1520-6149
  • Print_ISBN
    0-7803-2431-5
  • Type

    conf

  • DOI
    10.1109/ICASSP.1995.479439
  • Filename
    479439
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2891405