• DocumentCode
    2891787
  • Title

    A modified reduced adder graph algorithm for multiplier block minimization in digital filters

  • Author

    Xu, Fei ; Chen, Jiajia ; Chang, Chip-Hong ; Jong, Ching-Chuen

  • Volume
    2
  • fYear
    2004
  • fDate
    6-9 Dec. 2004
  • Firstpage
    705
  • Lastpage
    708
  • Keywords
    Adders; Costs; Digital filters; Finite impulse response filter; Hamming weight; Logic; Minimization methods; Performance analysis; Signal processing algorithms; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
  • Print_ISBN
    0-7803-8660-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.2004.1412975
  • Filename
    1412975
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2891787