Title :
A combined interval and floating-point comparator
Author :
Kaas, C.M. ; Stine, Janies E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Abstract :
Interval arithmetic provides an efficient method for monitoring and controlling errors in numerical calculations. However, existing software packages for interval arithmetic are often too slow for numerically intensive calculations. This paper presents the design of a comparator that performs either interval or two´s complement/floating-point comparisons. This comparator requires only slightly more area than a conventional floating point comparator, and provides a significant performance improvement over software implementations of interval comparisons. Both serial and parallel designs are examined and the results are implemented in AMI 0.60 μm technology.
Keywords :
comparators (circuits); error analysis; floating point arithmetic; parallel architectures; software packages; 0.60 micron; AMI; comparator design; error control; error monitoring; interval arithmetic; numerically intensive calculation; serial-parallel design; software package; Computer architecture; Computerized monitoring; Coprocessors; Delay estimation; Digital arithmetic; Error correction; Hardware; Laboratories; Upper bound; Very large scale integration;
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Seventh Asilomar Conference on
Print_ISBN :
0-7803-8104-1
DOI :
10.1109/ACSSC.2003.1292379