Skew safety and logic flexibility in a true single phase clocked system

In this paper, we show that a single clock phase is sufficient to build several skew safe communication circuits. The communication is guaranteed to function for all types of clock skew. No delay matching is necessary in the clock distribution network and the circuits are skew insensitive for all process, temperature and supply variations. Stage interconnect rules are summarized in a graph, suitable for use in CAD tools for both timing verification and synthesis of extremely timing robust systems