A 0.1-fref BW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering

This work presents a 1GHz ΔΣ fractional-N PLL based on the noise filtering by FIR-embedded phase interpolator (PI). The proposed PI scheme greatly improves phase linearity by a dual-referenced interpolation and realizes FIR filtering without using multiple CPs, PFDs, and dividers. The designed fractional-N PLL shows a comparable phase-noise performance to that of an integer-N PLL. The PLL is implemented in 0.13 μm CMOS technology.