Title :
A highly parallel and scalable CABAC decoder for next generation video coding
Author :
Sze, Vivienne ; Chandrakasan, Anantha P.
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
This paper presents a silicon prototype for a pre-standard algorithm developed for HEVC ("H.265") called Massively Parallel CABAC (MP CABAC) that addresses a key video decoder bottleneck. The test chip has over an order-of-magnitude higher throughput than state-of-the-art H.264/AVC CABAC engines, while maintaining high coding efficiency. Architecture and joint algorithm-architecture optimizations, which modify the MP-CABAC algo rithm, are used to reduce critical path delay and memory size.
Keywords :
adaptive codes; arithmetic codes; binary codes; video coding; H.264-AVC engines; context-based adaptive binary arithmetic coding; joint algorithm-architecture optimizations; massively parallel CABAC; next generation video coding; scalable CABAC decoder; Automatic voltage control; Context; Decoding; Encoding; Engines; Parallel processing; Throughput;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-61284-303-2
DOI :
10.1109/ISSCC.2011.5746248