Title :
A Fully Integrated Architecture for Fast Programming of Floating Gates
Author :
Basu, Arindam ; Hasler, Paul
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta
Abstract :
We present an on-chip system that enables programming floating gate arrays at a high speed. The main component allowing this speedup is a floating point current measuring ADC operating over 4 decades at 10bit accuracy or 7decades at 7 bit accuracy. The conversion time is around 200 mus till around 30 pA of current. The gate and drain voltages are set by on-chip DACs. The digital words for the DAC are sent by an FPGA through an SPI interface. The controller for sequencing the operations as well as the look-up-table with characterization data are on the FPGA. Algorithms using either pulse-width modulation or drain voltage modulation can be implemented.
Keywords :
analogue-digital conversion; floating point arithmetic; programmable logic arrays; system-on-chip; FPGA; SPI interface; drain voltage modulation; fast programming; floating gates; floating point current measuring ADC; fully integrated architecture; look-up-table; on-chip DAC; on-chip system; pulse-width modulation; Analog computers; Automatic programming; Computer architecture; Current measurement; Field programmable analog arrays; Field programmable gate arrays; Nonvolatile memory; Pulse modulation; Space vector pulse width modulation; Voltage;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378085
