A new IFFT/FFT hardware implementation structure for OFDM applications

Author

Chen, Shung-Chih ; Yu, Chao-Tang ; Tsai, Chia-Lian ; Tang, Jing-Jou

Author_Institution

Dept. of Electron. Eng., Southern Taiwan Univ. of Technol., Taiwan

Volume

2

fYear

2004

fDate

6-9 Dec. 2004

Firstpage

1093

Abstract

In OFDM applications, IFFT/FFT hardware in the transceiver is usually designed jointly to carry out IFFT and FFT functions for transmission and receiving processes, respectively. We present a new IFFT/FFT hardware implementation structure with less complexity for OFDM applications. The proposed method can be applied to existing various FFT algorithms while implementing the OFDM. The 64-point IFFT/FFT chips for the radix-4/2 and radix-2/4/8 algorithms based on the proposed scheme are implemented by using TSMC 0.35 μm, TSMC 0.25 μm and UMC 0.18 μm CMOS technologies. The implementation results show that our method can achieve a less complexity and area-efficiency IFFT/FFT processor.

Keywords

CMOS integrated circuits; OFDM modulation; fast Fourier transforms; pipeline processing; 0.18 micron; 0.25 micron; 0.35 micron; 64-point IFFT-FFT chips; FFT algorithms; FFT function; IFFT function; IFFT-FFT hardware; IFFT-FFT processor; OFDM applications; TSMC CMOS technology; UMC CMOS technology; pipeline processing; radix-2 algorithm; radix-4 algorithm; radix-8 algorithm; receiving process; transceiver; transmission process; Algorithm design and analysis; CMOS technology; Chaotic communication; Design engineering; Discrete Fourier transforms; Hardware; Multimedia systems; OFDM; Process design; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-8660-4

Type

conf

DOI

10.1109/APCCAS.2004.1413074

Filename

1413074