Abstract :
The following topics are dealt with: field programmable gate arrays; encryption; network-on-chip; image processing; video processing; ASICs; reconfigurable architecture compiler; reconfigurable processors; random number generators; PLL; hardware-software codesign; financial modelling; biological modelling and algorithm acceleration.
Keywords :
biology computing; cryptography; field programmable gate arrays; finance; hardware-software codesign; image processing; network-on-chip; phase locked loops; ASIC; PLL; algorithm acceleration; biological modelling; encryption; field programmable gate arrays; financial modelling; hardware-software codesign; image processing; network-on-chip; random number generator; reconfigurable architecture compiler; reconfigurable processor; video processing;
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
DOI :
10.1109/FPL.2008.4629891
