Analogue fault simulation

Author

Spinks, S.J. ; Bell, I.M.

Author_Institution

Dept. of Electron. Eng., Hull Univ., UK

fYear

1994

fDate

1994

Firstpage

42614

Lastpage

42618

Abstract

Analogue testing often takes a functional approach. However, a number of structural (fault-orientated) approaches are being investigated and have been shown to have advantages such as reliability indication. One of the main problems with a structural approach is the lengthy run times for analogue fault simulation (AFS). The paper describes the use of higher level modelling of analogue functional blocks as part of a multi-level simulation in order to accelerate AFS, and assesses its impact in terms of speedup and accuracy. Software tools which have been developed to give an indication of fault coverage for analogue circuits are also described. The paper concludes that a mixed-mode approach can reduce AFS time for larger circuits without excessive loss of accuracy

Keywords

CMOS analogue integrated circuits; automatic test software; circuit analysis computing; fault diagnosis; integrated circuit reliability; mixed analogue-digital integrated circuits; accuracy; analogue fault simulation; analogue functional blocks; analogue testing; fault coverage; fault-orientated approaches; functional approach; higher level modelling; mixed level simulation; mixed-mode approach; multi-level simulation; reliability indication; software tools; speedup; structural approach;

fLanguage

English

Publisher

iet

Conference_Titel

Mixed Mode Modelling and Simulation, IEE Colloquium on

Conference_Location

London

Type

conf

Filename

383641