DocumentCode
2894941
Title
A leakage reduced HVIC with coarse-fine UVLO
Author
Sungpah Lee ; Kunhee Cho ; Minwoo Lee ; Wookang Jin
Author_Institution
Fairchild Semicond., Bucheon, South Korea
fYear
2012
fDate
4-7 Nov. 2012
Firstpage
408
Lastpage
411
Abstract
This paper presents a leakage reduced HVIC using coarse-fine UVLO deploying a coarse UVLO to minimize current consumption of the fine UVLO in idling mode, which overcomes the disadvantage of conventional high side UVLO in HVIC. The proposed HVIC is implemented in 0.5μm Fairchild HDG4D 650V CMOS process. The total current consumption of HVIC including coarse-fine UVLO at 3V power supply is 1μA, which is 10 times smaller current consumption than HVIC with conventional high side UVLO.
Keywords
CMOS integrated circuits; power integrated circuits; Fairchild HDG4D CMOS; HVIC; UVLO; current 1 muA; current consumption; high-voltage integrated circuits; power supply; size 0.5 mum; voltage 3 V; voltage 650 V; Batteries; Generators; Integrated circuits; Noise cancellation; Power demand; Resistors; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2012 International
Conference_Location
Jeju Island
Print_ISBN
978-1-4673-2989-7
Electronic_ISBN
978-1-4673-2988-0
Type
conf
DOI
10.1109/ISOCC.2012.6406882
Filename
6406882
Link To Document