DocumentCode :
2895095
Title :
Rapid estimation of power consumption for hybrid FPGAs
Author :
Ho, Chun Hok ; Leong, Philip H W ; Luk, Wayne ; Wilton, Steven J E
Author_Institution :
Dept. of Comput., Imperial Coll. London, London
fYear :
2008
fDate :
8-10 Sept. 2008
Firstpage :
227
Lastpage :
232
Abstract :
A hybrid FPGA consists of island-style fine-grained units and domain-specific coarse-grained units. This paper describes an approach to estimate the power consumption of a set of hybrid FPGA architectures. The dynamic power consumption of the fine-grained units is obtained using standard FPGA tools, and the coarse-grained units using standard ASIC tools. Based on this approach, the dynamic power consumption of different hybrid FPGA architectures can be studied and we report on results over a set of floating point benchmark circuits.
Keywords :
field programmable gate arrays; low-power electronics; domain-specific coarse-grained units; floating point benchmark circuits; hybrid FPGA; island-style fine-grained units; power consumption; standard ASIC tools; standard FPGA tools; Application specific integrated circuits; Circuit simulation; Delay; Energy consumption; Field programmable gate arrays; Power dissipation; Power engineering and energy; Power engineering computing; Power measurement; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
Type :
conf
DOI :
10.1109/FPL.2008.4629936
Filename :
4629936
Link To Document :
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