Design of multi-core rasterizer for parallel processing

As resolution for displays is recently more and more increasing, the amount of data and calculation that graphic hardware needs to process are also increasing. Especially the amount of data processing by Rasterizer is rapidly increasing. This paper used an algorism using coordinates in center of gravity and area for triangle instead of using bilinear algorism [1] used by conventional interpolation, which is to make it easier for parallel processing by Rasterizer. This paper implemented designed Rasterizer under FPGA environment and compared it with conventional Rasterizer and verified it. This Rasterizer is proved to have approximately 50% higher performance compared to conventional one.