• DocumentCode
    2895951
  • Title

    VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition

  • Author

    Luethi, P. ; Burg, A. ; Haene, S. ; Perels, D. ; Felber, N. ; Fichtner, W.

  • Author_Institution
    Integrated Syst. Lab., ETH, Zurich
  • fYear
    2007
  • fDate
    27-30 May 2007
  • Firstpage
    1421
  • Lastpage
    1424
  • Abstract
    The QR decomposition is an important, but often underestimated prerequisite for pseudo- or non-linear detection methods such as successive interference cancellation or sphere decoding for multiple-input multiple-output (MIMO) systems. The ability of concurrent iterative sorting during the QR decomposition introduces a moderate overall latency, but provides the base for an improved layered stream decoding. This paper describes the architecture and results of the first VLSI implementation of an iterative sorted QR decomposition preprocessor for MIMO receivers. The presented architecture performs MIMO channel preprocessing using Givens rotations in order to compute the minimum mean squared error QR decomposition
  • Keywords
    MIMO communication; codecs; decoding; least squares approximations; radio receivers; Givens rotations; MIMO channel preprocessing; MIMO receivers; VLSI implementation; iterative sorted MMSE QR decomposition; minimum mean squared error; multiple-input multiple-output; nonlinear detection methods; pseudo detection; Bit error rate; Interference cancellation; Iterative decoding; MIMO; Matrix decomposition; Maximum likelihood decoding; Signal processing algorithms; Signal to noise ratio; Throughput; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    1-4244-0920-9
  • Electronic_ISBN
    1-4244-0921-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2007.378495
  • Filename
    4252915