A 2.4 Gbit/s silicon hybrid integrated fibre optic transmitter

The demand for higher speed and smaller packages introduces high density interconnects and higher power densities. At low frequencies, the high density interconnect does not significantly alter the performance of the designs. However, at high frequencies, the parasitics introduced by the interconnect can be a decisive factor in determining the success or failure of a module. Higher power density and the limitation on the maximum junction temperature of the devices require careful thermal design of the overall assembly structure. This paper describes the steps taken to design 2.4 Gbit/s fibre optic transmitters as part of the LINK HOIS project