Title :
A comparison of embedded reconfigurable video-processing architectures
Author :
Claus, C. ; Stechele, W. ; Kovatsch, M. ; Angermeier, J. ; Teich, Jurgen
Author_Institution :
Inst. for Integrated Syst., Tech. Univ. Munchen, Munich
Abstract :
Using field programmable gate arrays (FPGAs) as accelerators for image or video processing operations and algorithms has gained increasing attention over the last few years. One reason for that is FPGAs are able to exploit both temporal and spatial parallelism. In this paper two platforms for FPGA-based real-time image and video processing are presented and compared against each other. With both of these platforms it is possible to update the physical resources during run-time by exploiting the dynamic partial reconfiguration capabilities of Xilinx Virtex FPGAs. The analysis of both platforms with respect to their benefits and draw-backs has led to the concept of an optimal FPGA-based dynamically and partially reconfigurable platform for real-time video and image processing.
Keywords :
embedded systems; field programmable gate arrays; reconfigurable architectures; video signal processing; Xilinx Virtex FPGA; dynamic partial reconfiguration capabilities; embedded reconfigurable architectures; field programmable gate arrays; real-time image processing; video-processing architectures; Acceleration; Computer architecture; Computer science; Feature extraction; Field programmable gate arrays; Hardware; Image processing; Random access memory; Read-write memory; Software algorithms;
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
DOI :
10.1109/FPL.2008.4630015