A 120dB-SNR 100dB-THD+N 21.5mW/channel multibit CT ΔΣ DAC

Author

Bandyopadhyay, Abhishek ; Determan, Michael ; Kim, Sejun ; Nguyen, Khiem

Author_Institution

Analog Devices, Wilmington, MA, USA

fYear

2011

fDate

20-24 Feb. 2011

Firstpage

482

Lastpage

483

Abstract

Automotive and consumer multi-channel 24 b audio systems have demanded low-cost digital-to-analog converters (DACs) which offer wide dynamic range, high linearity, small die size, and low power consumption such that the system can be housed in a small low-cost plastic package. Several 120 dB SNR audio ΔΣ DACs have been reported using either switched-capacitor or continuous-time techniques. This paper presents a continuous time (CT) area optimized multibit DAC which achieves 120dB SNR and 100dB THD+N at 21.5mW/chan nel. This performance is achieved by using a new 3-level rotational data shuffling scheme which achieves small area and low digital activity at low signal level, and by applying low-power low-noise analog techniques.

Keywords

delta-sigma modulation; harmonic distortion; low-power electronics; plastic packaging; switched capacitor networks; 3-level rotational data shuffling scheme; HD; SNR; audio systems; continuous time area optimized multibit DAC; continuous-time techniques; low power consumption; low-cost digital-to-analog converters; low-cost plastic package; low-power low-noise analog techniques; multibit CT ΔΣ DAC; switched capacitor; Conferences; Generators; Modulation; Performance evaluation; Power demand; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-61284-303-2

Type

conf

DOI

10.1109/ISSCC.2011.5746407

Filename

5746407