DocumentCode
2896618
Title
Statistical analysis-based approach for check node processor inputs of NB-LDPC decoder
Author
Al Ghouwayel, Ali Chamas ; Nasser, A. ; Alaeddine, Ali ; Hijazi, Hussein
Author_Institution
CCE Dept., Lebanese Int. Univ. (LIU), Beirut, Lebanon
fYear
2013
fDate
19-21 June 2013
Firstpage
381
Lastpage
385
Abstract
Non-Binary LDPC codes are nowadays considered as a potential competitor of both binary LDPC and convolutional Turbo Codes, mainly when codes with short and moderate codeword lengths are used. However, the Non-Binary nature of these codes makes their decoding process suffers from high computational complexity. This paper deals with the reduction of this computational complexity at the Check Node level based on the selection of the most reliable messages effectively impacting the CN processing. Two main message truncation schemes are proposed leading to a reduction of the memory size needed to store the extrinsic reliability messages of the order of 12 %. The Monte Carlo simulation results show that these truncation schemes do not degrade the performance of the code where in the worst case a loss of 0.06 dB is obtained.
Keywords
Monte Carlo methods; computational complexity; convolutional codes; parity check codes; statistical analysis; turbo codes; Monte Carlo simulation; NB-LDPC decoder; check node level; check node processor; computational complexity; convolutional turbo codes; message truncation schemes; nonbinary LDPC codes; statistical analysis; Computational complexity; Decoding; Equations; Parity check codes; Reliability; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technology (ICCIT), 2013 Third International Conference on
Conference_Location
Beirut
Print_ISBN
978-1-4673-5306-9
Type
conf
DOI
10.1109/ICCITechnology.2013.6579584
Filename
6579584
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