A 90nm Quadrature Generator with Frequency Extension up to 4GHz

Author

Stengel, Bob ; Rami, Said

Author_Institution

Motorola Labs., Plantation, FL

fYear

2007

fDate

27-30 May 2007

Firstpage

1697

Lastpage

1700

Abstract

A 90nm CMOS design generates differential quadrature signals (I, In, Q, Qn) from 500MHz to 4GHz dissipating 26mW. A differential half wavelength DLL is used that reduces power dissipation, sideband noise and random unit delay error accumulation by a factor of 2 compared to full wavelength DLL designs. A custom combinatorial logic circuit extends the input frequency 500MHz to 1GHz up to 4GHz. Programmable charge pump current and series delay were added to compensate the differential quadrature duty cycle and quadrature accuracy at a transceiver measurement level.

Keywords

CMOS integrated circuits; combinational circuits; delay lock loops; integrated circuit design; microwave integrated circuits; programmable circuits; radio receivers; transceivers; voltage multipliers; 0.5 to 4 GHz; 26 mW; 90 nm; CMOS design; combinatorial logic circuit; delay lock loop; differential half wavelength DLL; differential quadrature duty cycle; differential quadrature signals; programmable charge pump current; quadrature generator; series delay; Added delay; Charge pumps; Circuit noise; Frequency; Logic circuits; Noise reduction; Power dissipation; Propagation delay; Signal design; Signal generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.377920

Filename

4252984