Session 8 overview / wireline: Architectures & circuits for next generation wireline transceivers

Summary form only given. Meeting the challenges for next generation communication systems demands a combination of circuit and architecture innovation. Circuit innovation, by extending the performance achievable using CMOS technologies, yields increasingly flexible standard-compliant designs, allows data rates to be pushed to new levels, and enables the creation of new ways to mitigate deep submicron technology constraints. Architecture innovation will have longer-term impact in areas ranging from addressing serial link power challenges to creating entirely new serial link application spaces.