Title :
Session 15 overview / high-performance digital: High-performance SoCs & components
Author :
Morton, Shannon ; Chua-Eoan, Lew
Author_Institution :
Icera, Bristol, United Kingdom
Abstract :
Summary form only given. Integration rules. Why? Here´s why. The number of transistors available on a die continues to grow in line with Moore´s law. In the previous decade, designers hit a wall in terms of how to make a single core processor utilize the available transistors efficiently. So they added larger caches. When the performance advantages of these caches flat-lined, they added multiple processor cores. This trend has dominated the industry for many years. Until now. A revolutionary shift is underway.
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-61284-303-2
DOI :
10.1109/ISSCC.2011.5746448