• DocumentCode
    2897860
  • Title

    High Speed Multiple Word Parallel Architecture for Bit Plane Coding used in JPEG 2000

  • Author

    Xiong, Cheng-yi ; Hou, Jian-hua ; He, Xiang

  • Author_Institution
    Coll. of Electron. Inf. Eng., South-Center Univ. for Nationalities, Wuhan
  • fYear
    2006
  • fDate
    13-16 Aug. 2006
  • Firstpage
    3703
  • Lastpage
    3708
  • Abstract
    This paper presented a high speed multiple word parallel architecture (MWPA) with sequential coding for fractional bit plane coding used in JPEG 2000, where all bit planes are coded in parallel, and all bit samples in the same bit plane are coded in sequential. The proposed MWPA adopts a technique of performing the coding pass prediction and context formation in parallel and pipelined fashion, thus context formation for a column of 4 coefficients could be achieved in each intra-clock cycle, and multiple passes coding of fractional bit plane coding are completed by one scan. Theoretical analysis and experimental results demonstrate that, the proposed MWPA could significantly increase throughput rate with good performance in terms of speedup to cost, compared with the previous works
  • Keywords
    image coding; parallel architectures; pipeline processing; sequential codes; JPEG 2000; coding pass prediction; fractional bit plane coding; multiple word parallel architecture; sequential coding; Block codes; Costs; Cybernetics; IEC standards; ISO standards; Image coding; Machine learning; Parallel architectures; Performance analysis; Throughput; Transform coding; Very large scale integration; JPEG 2000; VLSI architecture; bit plane coding; high speed; parallel; pipeline; sequential;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Machine Learning and Cybernetics, 2006 International Conference on
  • Conference_Location
    Dalian, China
  • Print_ISBN
    1-4244-0061-9
  • Type

    conf

  • DOI
    10.1109/ICMLC.2006.258630
  • Filename
    4028714