FO4-based models for area, delay and energy of polynomial multiplication over binary fields

Accurate mathematical models are crucial for design and evaluation of systems and architectures. To provide models that can accurately describe polynomial multipliers in F₂[x], we integrate the traditional gate-counting method and the fanout four (FO4) model. We show that the resulting model provides much more accurate estimates than the traditional model and can be obtained by straight-forward modification to the traditional models. Implementation results indicate that the conventional gate delay model has 40% error, while the presented model has less than 4% error. We also show that the ceiling function, conventionally used in delay equations, are not needed in the new model. Moreover, we give a model for the energy consumption of polynomial multiplication, which can be used to estimate power consumption of finite field multiplication. To evaluate the accuracy of our models, we provide ASIC implementation results and compare them to results obtained from models.