Title :
A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures
Author :
De Miranda, Fernando P H ; Navarro, João ; Van Noije, Wilhelmus
Author_Institution :
Escola Politecnica de Sao Paulo, Univ. de Sao Paulo
Abstract :
The design of a dual modulus prescaler 32/33 in a 0.35mum CMOS technology is presented. In the circuit the technique called extended true single phase clock (E-TSPQ was applied. Additionally, some dedicated structures to double the data output rate were also employed. The prescaler was implemented, tested and experimental results indicated that the circuit can reach up to 4.12 GHz with 4.93 mW of power consumption at 3.6 V power supply.
Keywords :
CMOS integrated circuits; MMIC; prescalers; 0.35 micron; 3.6 V; 4.12 GHz; 4.93 mW; CMOS technology; dual modulus prescaler; extended true single phase clock; CMOS logic circuits; CMOS technology; Circuit testing; Clocks; Energy consumption; Latches; MOS devices; Power supplies; Radio frequency; Throughput;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378344
