Title :
A synthesis algorithm for customized heterogeneous multi-processors
Author :
Soleymanpour, Rahim ; Mohammadi, Soheil ; Rajabi, Hamid
Author_Institution :
Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
Abstract :
Today, running applications on embedded systems demand more computation to satisfy requirements such as performance and power consumption. Multiprocessor systems on chip (MPSoC) provide practical solution by having significant effect on throughput. We can employ application-specific instruction set processor (ASIP) concept to customize each processor in MPSoC platform based on the application mapped onto it. Here, we propose an algorithm to synthesize an optimal heterogeneous MPSoC with ASIP and also identify map an application on MPSoC platform. The synthesis algorithm and the scheduling are executed simultaneously. Additionally, the synthesis algorithm identifies processor numbers to reach maximum performance. Experimental results show an average speedup of 42.71% and energy consumption on Network on Chip (NoC) of 30.77% compared to a homogenous MPSoC.
Keywords :
embedded systems; instruction sets; multiprocessing systems; network-on-chip; power consumption; processor scheduling; ASIP concept; NoC; application-specific instruction set processor; customized heterogeneous multiprocessors; embedded systems; energy consumption; homogenous MPSoC; multiprocessor systems on chip; network on chip; optimal heterogeneous MPSoC; power consumption; processor scheduling; synthesis algorithm; Algorithm design and analysis; Data communication; Energy consumption; Heuristic algorithms; Processor scheduling; Scheduling; Telecommunication traffic; application-specific instruction-set processor (ASIP); hardware/software codesign; heterogeneous MPSoC; synthesis algorithm;
Conference_Titel :
SoC Design Conference (ISOCC), 2012 International
Conference_Location :
Jeju Island
Print_ISBN :
978-1-4673-2989-7
Electronic_ISBN :
978-1-4673-2988-0
DOI :
10.1109/ISOCC.2012.6407062
