DocumentCode
2898405
Title
An on-chip TSV emulation using metal bar surrounded by metal ring to develop interface circuits
Author
Il-Min Yi ; Seung-Jun Bae ; Young-Soo Sohn ; Jae-Yoon Sim ; Hong-June Park
Author_Institution
Dept. of Electron. & Electr. Eng., Pohang Univ. of Sci. & Technol. (POSTECH), Pohang, South Korea
fYear
2012
fDate
4-7 Nov. 2012
Firstpage
192
Lastpage
195
Abstract
TSV is considered to be the next industry standard for chip interconnects because of huge number of I/O pins and high frequency capability. However, TSV is not readily available to develop interface circuits. An on-chip TSV emulation is presented by using a horizontal metal bar surrounded by a horizontal metal ring on a silicon chip with a 0.13-μm CMOS process. The resistance and capacitance of emulated TSVs and the substrate resistance are extracted as an HSPICE W-element model through measurements with an LCR meter and the oscillation frequency of on-chip ring oscillator. The comparison of the S-parameter measurements (transmission, crosstalk) showed good agreement between measurements and the simulation using the extracted parameters.
Keywords
CMOS integrated circuits; S-parameters; SPICE; elemental semiconductors; silicon; CMOS process; HSPICE; I/O pins; S-parameter measurements; Si; W-element model; capacitance; chip interconnects; high frequency capability; horizontal metal bar; interface circuits; metal ring; on-chip TSV emulation; resistance; silicon chip; 3D IC; emulation; through silicon via (TSV);
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2012 International
Conference_Location
Jeju Island
Print_ISBN
978-1-4673-2989-7
Electronic_ISBN
978-1-4673-2988-0
Type
conf
DOI
10.1109/ISOCC.2012.6407072
Filename
6407072
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