DocumentCode
2899357
Title
On-Chip Substrate Noise Suppression Using Clock Randomization Methodology
Author
Wang, Yuxin ; Ignjatovic, Zeljko
Author_Institution
Dept. of Electr. & Comput. Eng., Rochester Univ., NY
fYear
2007
fDate
27-30 May 2007
Firstpage
2176
Lastpage
2179
Abstract
We present a method for substrate coupling noise suppression that employs a pseudo-random clock. A pseudo-random sequence is utilized to randomize the pulse train of the system periodic clock effectively decorrelating its discrete spectral tones. Therefore, the discrete portion (spectral spikes) of the power spectral density of the regular clock is dispersed and the continuous (wide-band) portion of the spectrum rises as a noise floor. This work shows that there is a 22dB attenuation of the harmonic power by utilizing the clock randomization method with respect to the standard clocking scheme where the periodic clock signal is deployed.
Keywords
circuit noise; clocks; interference suppression; random sequences; clock randomization methodology; discrete spectral tones; harmonic power; on-chip substrate noise suppression; periodic clock signal; power spectral density; pseudo-random clock; pseudorandom sequence; Circuit noise; Clocks; Current supplies; Digital circuits; Noise generators; Noise level; Noise reduction; Power supplies; Switching circuits; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378605
Filename
4253103
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