Carrier transport test structure for characterization of poly/monosilicon interfaces

A combination of diode and inverse transistor test devices with a common basic geometry has been used to investigate the minority carrier transport through the p-monosilicon/p+-polysilicon sandwich. A method to separate the combined influence of the interface and polysilicon from that of the underlying monosilicon is presented. The device structures, the measurements, and the current separation methods are described. The most striking result is a clear dependence of the minority carrier transport properties of the interface on the doping of the underlying monosilicon