Title : 
Miniaturization innovation evolution of electronics packaging - What´s coming next …?
         
        
            Author : 
Wagiman, Amir Nur Rashid
         
        
            Author_Institution : 
Materials Technology Development, Intel Technologies, MALAYSIA
         
        
        
            fDate : 
Nov. 30 2010-Dec. 2 2010
         
        
        
        
            Abstract : 
Intel´s Moore´s Law focuses on shrinking the transistors in the silicon to be able to pack more and more transistors for a given area. In general, Intel has been able to double the transistor count every 18–24 months and has been doing so while keeping the silicon size at about the same size or even smaller. The key implication to that trend has been the I/O density that needs to be routed through the packaging is also increasing (ie. More I/O count per area).
         
        
            Keywords : 
Arrays; Electronics packaging; Flip chip; Packaging; Silicon; System-on-a-chip; Transistors;
         
        
        
        
            Conference_Titel : 
Electronic Manufacturing Technology Symposium (IEMT), 2010 34th IEEE/CPMT International
         
        
            Conference_Location : 
Melaka, Malaysia
         
        
        
            Print_ISBN : 
978-1-4244-8825-4
         
        
        
            DOI : 
10.1109/IEMT.2010.5746753