Abstract :
In this Year of the Tiger the economy is recovering from one of the worst economic crisis of recent years. The global electronics industry has experienced significant consolidations with changes in leadership and new players. The electronics market is brimming with new and exciting electronic products for the ever more connected world. Since the invention of transistor some sixty odd years ago, the progress of electronics has been paced by Moore´s Law, and packaging has been an important contributor. With the ascendancy of the consumer market, the function and realm of electronic products have increased many folds, and speed and performance are no longer the sole driver. In this era of More Moore and More than Moore, packaging technology has become the critical enabler for the electronics industry. For the packaging engineering professionals the last decade has been a period of blossoming of many innovations and steady technology advancements. And the pace had not slackened. Cu wirebond is infiltrating the gold wirebond space that has long been occupied since the invention of integrated circuits some sixty years ago. Flip chip CSP and Wafer level CSP are becoming mainstream. And the traditional high lead and eutectic solder materials are being replaced by lead free solder and copper bump. With the advent of deep submicron nodes the study of chip-package interaction is crucial. In the meantime the world of 3D packaging is evolving in measured pace from die stacking, to package on package (POP) and Package in Package (PIP), towards wafer-level fan-out and 2.5 D and 3D IC. Are they real disruptive technologies? And an equally relevant question is Disruptive for Whom? This talk will examine the market landscape and technology trends from the perspective of packaging engineers, and ask ourselves a different and crucial question “how is practice the engineering changing in this Year of the Tiger?”
