DocumentCode :
2900151
Title :
Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics
Author :
Kamboh, Awais M. ; Raetz, Matthew ; Mason, Andrew ; Oweiss, Karim
Author_Institution :
Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI
fYear :
2007
fDate :
27-30 May 2007
Firstpage :
2371
Lastpage :
2374
Abstract :
Discrete wavelet transform (DWT) has been shown to provide exceptionally efficient data compression for neural records. This paper describes an area-power minimized hardware implementation of the lifting scheme for multi-level, multi-channel DWT. Performance tradeoffs and key design decisions for implantable neuroprosthetics are analyzed. A 32-channel, 4-level version of the circuit has been custom designed in 0.18mum CMOS and occupies only 0.16mm2.
Keywords :
CMOS digital integrated circuits; biomedical electrodes; data compression; discrete wavelet transforms; medical signal processing; neural nets; prosthetics; 0.18 micron; CMOS integrated circuits; area-power efficient lifting-based DWT hardware; data compression; discrete wavelet transform; implantable neuroprosthetics; multilevel multichannel DWT; neural records; Circuits; Computer architecture; Data compression; Data engineering; Discrete wavelet transforms; Filters; Hardware; Microelectrodes; Neural prosthesis; Performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
Type :
conf
DOI :
10.1109/ISCAS.2007.377936
Filename :
4253152
Link To Document :
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