Automating qualification of reconfigurable cores

Cores are reusable components, often in the form of parametrised hardware libraries. This paper describes a framework for demonstrating automatically the quality of cores, such as their correctness and efficiency. We explore the desirable features of such frameworks for reconfigurable devices, and present prototypes for Xilinx FPGAs. Our approach involves the use of a qualification script to automate the management of various procedures, such as functional simulation and timing analysis in software, core characterisation using a hardware platform, and formal verification using the PVS system