Title :
A high performance memory compiler for multi-port RAMs
Author :
Tsao, Kuang-Pin ; Zhu, Nick ; Pham, Tung
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
Abstract :
Three-port (2-read, 1-write) and six-port RAMs (3-read, 3-write and 4-read, 2-write) which are parts of the MEMCOMP memory compiler libraries are presented. These ASIC RAMs feature high-speed, low-power, and flexible configurations. They can be generated by MEMCOMP through a user´s specified set of inputs, such as family type, number of words, number of bits and number of bits per subword
Keywords :
CMOS integrated circuits; SRAM chips; application specific integrated circuits; circuit layout CAD; ASIC RAMs; ASIC memories; CMOS SRAMs; MEMCOMP memory compiler libraries; family type; flexible configurations; high-speed; low-power; memory compiler; multiport RAMs; number of bits; number of bits per subword; number of words; six-port RAMs; user specified input set; Application specific integrated circuits; Automatic testing; CMOS technology; Large scale integration; Latches; Logic; Pins; Random access memory; Read-write memory; Wires;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186109
